Peripheral structure for monolithic power device
US6459102B1 · kind B1 · utility
1Cited by
1References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 9, 2001 |
| Grant date | Oct 1, 2002 |
| Priority date | — |
| Expiry date | Oct 9, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A peripheral structure for a monolithic power device, preferably planar, includes front and rear surfaces, connected respectively to a cathode and an anode, two junctions respectively reverse-biased and forward-biased when a direct and adjacent voltage is respectively applied to the two surfaces and at least an insulating box connecting the front and rear surfaces. The structure is such that when a direct voltage or a reverse voltage is applied, generating equipotential voltage lines, the insulating box enables to distribute the equipotential lines in the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.