Semiconductor configuration and current limiting device
US6459108B1 · kind B1 · utility
15Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 25, 1999 |
| Grant date | Oct 1, 2002 |
| Priority date | — |
| Expiry date | Oct 25, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/831
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The semiconductor configuration is formed with a lateral channel region and an adjoining vertical channel region in an n-conductive first semiconductor region. When a predetermined saturation current is exceeded, the lateral channel region is pinched off and the current is limited to a value below the saturation current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.