Auto-calibration circuit to minimize input offset voltage in an integrated circuit analog input device
US6459335B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2000 |
| Grant date | Oct 1, 2002 |
| Priority date | — |
| Expiry date | Jan 22, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An auto-calibration circuit minimizes input offset voltage in an integrated circuit analog input device. The auto-calibration circuit may also calibrate a plurality of analog input devices on an integrated circuit die or in a multi-chip package (MCP). The auto-calibration circuit and analog input device(s) may be fabricated in combination with a microcontroller system on an integrated circuit die or in an MCP. The auto-calibration circuit controls input offset voltage compensation circuit that counteracts or compensates for input offset voltage so as to minimize voltage error at the output of the analog input device. A digital control circuit applies a digital word to the input offset voltage compensation circuit for generating the required input offset voltage compensation. A linear search or binary search of various values of the digital word may be used by the digital control circuit. The digital control circuit switches the inputs, the output and feedback-gain determining resistors for the analog input device during a calibration mode. A voltage comparator compares the output of the analog input device and a voltage reference. When the output of the analog input device is equal…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.