Multi-bank flash ADC array with uninterrupted operation during offset calibration and auto-zero
US6459394B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2001 |
| Grant date | Oct 1, 2002 |
| Priority date | — |
| Expiry date | May 22, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/36
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method is disclosed for calibrating comparators of an ADC while the ADC continues to operate in an uninterrupted fashion. Groups (banks) of interleaved comparators may be calibrated at random or psuedo-random times while the ADC is performing conversions without the addition of extra “proxy” or replacement comparators. More particularly, at periodic intervals the comparators of one bank may be disconnected from the standard ADC circuitry for calibration or auto-zeroing while the comparators in the remaining bank(s) are left in the data conversion path. In order to prevent a significant degradation in the conversion quality, logic downstream of the comparators provides the necessary adjustments to accommodate for the removal of the comparators and outputs a word of the desired bit length. The multi-bank ADC is particularly advantageous for use with optical data storage systems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.