Digital-to-analog converter and display unit with such digital-to-analog converter
US6459395B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2000 |
| Grant date | Oct 1, 2002 |
| Priority date | — |
| Expiry date | Oct 27, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/765
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a reference-voltage-selection-type D/A converter, the channel widths of transistors of MOS switches of gradation selecting units are weighted depending on the selected gradation. Specifically, the channel width of the MOS switches Qn11, Qn12 is represented by W0, the channel width of the MOS switches Qn13, Qp11 is represented by W1, the channel width of the MOS switches Qp12, Qn14 is represented by W2, and the channel width of the MOS switches Qp13, Qp14 is represented by W3. The channel width W3 is set to a size corresponding to the maximum capacitance of a column line, and the other channel widths W0, W1, W2 are set to satisfy the relationship: W0<W1<W2<W3. With this arrangement, the frame of a display panel which incorporates the D/A converter is reduced in size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.