System and method for establishing processor redundancy
US6460146B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 1998 |
| Grant date | Oct 1, 2002 |
| Priority date | — |
| Expiry date | Dec 4, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2023
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to providing processor redundancy in a system such as a router. According to an embodiment of the present invention, in a system having two or more processors, initialization sequence is started. During the initialization sequence, a redundancy subsystem is initialized. The redundancy subsystem identifies the projects or assignments that are to be off loaded from the primary processor to the secondary processor. According to an embodiment of the present invention, the initialization sequence is then suspended and a discovery process is performed. During the discovery process, it is determined whether the processor running the initialization sequence is a primary or a secondary processor. If it is a secondary processor, then the initialization sequence remains suspended and the secondary processor monitors the health of the primary processor until a failure of the primary processor occurs. If a primary processor failure occurs, then the initialization process is resumed for the secondary processor, hence establishing the secondary processor as the new primary processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.