Solder bump forming method, electronic component mounting method, and electronic component mounting structure
US6461953B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2001 |
| Grant date | Oct 8, 2002 |
| Priority date | — |
| Expiry date | Feb 7, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0577
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A solder bump forming method includes the steps of packing solder (5) into a plurality of recesses (11) provided to the surface layer (12) of a substrate (1); and melting/hardening the solder to form solder bumps (5A) within the recesses (11). The solder bump forming method further includes, prior to the step of packing solder (5) into the plurality of recesses (11), a step of adhering or arranging a film (4) over the surface layer (12), and a step of producing in the film (4) a plurality of window portions (40) communicating with the plurality of recesses. The film (4) is composed of a material principal component of which is different from the material of the substrate (1).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.