Magnetic random access memory
US6462981B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2001 |
| Grant date | Oct 8, 2002 |
| Priority date | — |
| Expiry date | Jun 19, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/943
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A matrix array of memory cells are located on intersections of word lines and sense lines. Each memory cell includes a magnetoresistance element and a switching element which establishes a resistive connection between a corresponding sense line and the magnetoresistance element when a corresponding word line is addressed. A number of sense circuits are respectively correspond to the sense lines. Each sense circuit includes a capacitive element connected to the corresponding sense line and a switching element for applying a voltage to the capacitive element and removing the voltage when the corresponding sense line is addressed, thereby discharging energy from the capacitive element through the resistive connection to the magnetoresistance element. The voltage developed across the capacitive element of each sense circuit is used to produce a binary output signal representative of information stored in an address memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.