Clock generating apparatus and method thereof
US6463013B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2000 |
| Grant date | Oct 8, 2002 |
| Priority date | — |
| Expiry date | Mar 21, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/23
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock generating apparatus and method for generating clock signals of different frequency. The clock generating apparatus and method receives and divides a main clock signal to obtain a reference clock signal. Then, the reference clock signal and the first feedback clock signal are phase-locked to obtain the first clock signal. Moreover, the reference clock signal and the second feedback clock signal are phase-locked to obtain the second clock signal. The reset signal and the first clock signal are received by a divider. The divider then outputs the first feedback clock signal. Another divider receives the reset signal and the second clock signal and then outputs the second feedback clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.