Processor based system with system wide reset and partial system reset capabilities
US6463529B1 · kind B1 · utility
31Cited by
15References
57Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 10, 1997 |
| Grant date | Oct 8, 2002 |
| Priority date | — |
| Expiry date | Feb 10, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/177
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor-based system includes a processing unit. The processing unit includes at least a processor and preferably also a cache memory, a cache memory controller and a numerical coprocessor. The processing unit is reset in response to a system reset signal being asserted at a reset input node and only selected portions of the processing unit are reset in response to a partial-reset signal being asserted at a partial-reset input node. The system can also include a number of other components such as video circuitry, a hard disk drive, bus interface circuitry, a speaker, a keyboard controller and a keyboard.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.