Sense amplifier for low voltage memories
US6466059B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 1999 |
| Grant date | Oct 15, 2002 |
| Priority date | — |
| Expiry date | Feb 12, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sense amplifier of the type coupled to a reference bit line and at least one cell array bit line. The sense amplifier includes an amplifying stage and a current voltage conversion circuit that compare a reference current from the reference bit line and a cell current from the cell array bit line. The current-voltage conversion circuit includes a voltage setting circuit for setting predetermined voltages on the reference bit line and the cell array bit line, a load circuit for the reference bit line and the cell array bit line, and current mirror circuits for mirroring the reference current and the cell current into the amplifying stage. The load circuit for the reference bit line and the current mirror circuit for the reference current are different circuits, and the load circuit for the reference bit line includes a transistor that mirrors a predetermined current that is generated outside of the sense amplifier. Another embodiment provides a sense amplifier that includes a first current mirror having one branch coupled to a cell array bit line, and a second current mirror having a branch coupled to both a reference bit line and another branch of the first current mirror. In one …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.