Method and arrangement for passing data between a reference chip and an external bus
US6467010B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2000 |
| Grant date | Oct 15, 2002 |
| Priority date | — |
| Expiry date | Feb 25, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4059
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and arrangement passes data between two busses without needing conventional bridge-interface protocols. Consistent with one method embodiment of the present invention, data is passed between a first bus on a reference chip and an external bus using a two-way buffer arrangement between the external bus and the first bus. The method includes coupling a two-way buffer arrangement between the external bus and the first bus, determining which of the busses is the initiating bus, and in response to this determination, controlling the two-way buffer arrangement to asynchronously copy data through the two-way buffer arrangement from the initiating bus to the other bus, wherein data is passed automatically in response to its presence at the buffer arrangement without any clock cycle delays. An example application is directed to interfacing with a bus used for a rapid silicon processing chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.