Method of fabricating a LDMOS transistor
US6468870B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2000 |
| Grant date | Oct 22, 2002 |
| Priority date | — |
| Expiry date | Dec 26, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/685
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a LDHOS transistor having a dielectric block under the gate electrode. A high voltage well, low voltage well (LV PW), and field oxide regions having bird beaks are provided in a substrate and overlay the high voltage well and the low voltage well. In a key step, a dielectric block is formed over the bird beaks of the field oxide regions. A gate is formed over the dielectric block. After this the LDMOS device is completed. The invention's dielectric block covers the bird's beaks of the field oxide regions and enhances the e-field tolerance. The invention's e-field enhancement dielectric block relieves the e-field near the bird's beak, thus increasing the breakdown voltage of the transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.