Short cell multiplexer
US6470014B1 · kind B1 · utility
3Cited by
4References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 17, 1998 |
| Grant date | Oct 22, 2002 |
| Priority date | — |
| Expiry date | Mar 17, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5672
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A short cell multiplexer includes a sequence designating unit, in which reading intervals corresponding to QOS classes are set in respective reading interval setting registers. A counter memory is stored with the number of timings at which the short cells can be read. The sequence designating unit specifies the QOS class in which the number of timings reaches the reading interval on the basis of the reading interval and the number of timings, and gives to a reading unit an indication of reading the short cell belonging to this class.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.