Semiconductor memory device
US6472707B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 18, 1999 |
| Grant date | Oct 29, 2002 |
| Priority date | — |
| Expiry date | Nov 18, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/30
Abstract
When a control gate electrode is processed using a control gate electrode processing mask, the control gate electrode in a region where the floating gate electrode has been removed is partially left. Because of the presence of the left control gate electrode, the gate electrode interlayer insulating film and gate insulating film below the control gate electrode are not dug in the region where the floating gate electrode has been removed. Therefore, when the floating gate electrode is removed, the semiconductor substrate is not dug. In this way, since the semiconductor substrate is not dug, the semiconductor memory device can be manufactured stably and precisely.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.