Use of logical addresses to implement module redundancy
US6473396B1 · kind B1 · utility
14Cited by
6References
26Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 4, 1999 |
| Grant date | Oct 29, 2002 |
| Priority date | — |
| Expiry date | Jan 4, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/1034
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus is described to implement a module redundant system using logical addresses. The apparatus may comprise a bus on which a plurality of server modules may be coupled to. One of the server modules may be configured to be active and remaining server modules may be configured to be on standby. A plurality of client modules may be coupled to the bus and configured to be in communication with the active server module using logical addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.