Apparatus for use in a logic analyzer for compressing digital data for waveform viewing
US6473700B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2000 |
| Grant date | Oct 29, 2002 |
| Priority date | — |
| Expiry date | Mar 14, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31921
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In a logic analyzer or similar binary signal-analyzing instrument, hardware circuitry, such as an ASIC, or other dedicated hardware, is used to perform waveform compression and summarization more rapidly than it could be done by software alone. The hardware is used to perform the compression of the data and to summarize its behavior for visual display. In one embodiment, the hardware starts from a given memory address and compares current timestamp values with final timestamp values to determine the length of the timeslice. Within the timeslice, all of the data is compared to determine whether it remains the same throughout the timeslice or whether it changes. The same approach can be used on violation data, such as glitches and setup and hold violations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.