Memory management method for use in computer system
US6473847B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 30, 1999 |
| Grant date | Oct 29, 2002 |
| Priority date | — |
| Expiry date | Mar 30, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to a method for managing memory in a computer whereby memory is divided into a first and a second section, and whereby the first and second sections are separately managed via a CPU. In accordance with the preferred embodiment of the present invention, data characteristics are used to determine which one of the first or second sections the data should be stored in. When the stored data are to be read out from the first section, single physical address information corresponding to a start position of the first section is received from the CPU so that a plurality of physical addresses corresponding to the individual read addresses are generated on the basis of the received physical address. However, when the stored data are to be read out from the second section, logical read addresses are generated and the physical address information is received from the CPU at each break between the pages so that the logical read addresses are converted into physical addresses using the received physical address. As a result, the frequency of interrupts made to the CPU for receiving the physical address can be considerably lowered.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.