Method for manufacturing a ferroelectric random access memory device
US6475860B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2001 |
| Grant date | Nov 5, 2002 |
| Priority date | — |
| Expiry date | May 31, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31116
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved method of manufacturing a capacitor structure for a ferroelectric random access memory (FeRAM) device on an active matrix having a first insulating layer comprising the steps of forming a buffer on the first insulating layer, a bottom electrode on the buffer, a capacitor thin film on the bottom electrode and a top electrode on the capacitor thin film. A second insulating layer is formed on the top electrode, the capacitor thin film and the first insulating layer, and then patterned and etched only once to form both a storage node contact hole and a cell plate contact hole. The capacitor structure is completed by forming a metal interconnection pattern on the second insulating layer and the contact holes to provide connection to the storage node and the cell plate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.