Reduced water adsorption for interlayer dielectric
US6475925B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2000 |
| Grant date | Nov 5, 2002 |
| Priority date | — |
| Expiry date | Apr 10, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02274
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor device is disclosed in which a fluorinated silicon dioxide layer is formed over a semiconductor substrate. A first undoped silicon dioxide layer, with a thickness preferably less than approximately 50 nanometers, is then formed on the fluorinated silicon dioxide layer with a PECVD process wherein a power ratio of a high frequency power source of the PECVD reactor to a low frequency power source is preferably in a range of approximately 0.2:1 to 0.4:1. In one embodiment, a second undoped silicon dioxide layer may be formed prior to forming the fluorinated silicon layer. The second undoped silicon dioxide, the fluorinated silicon dioxide layer, and the first undoped silicon dioxide layer may be formed sequentially in the same plasma enhanced chemical vapor deposition process chamber during a single chamber evacuation cycle. The first undoped silicon dioxide layer is preferably characterized as having a refractive index greater than approximately 1.460. The first undoped silicon dioxide layer has a compressive stress that is approximately 1.5 times greater than the fluorinated silicon dioxide layer. In one embodiment, the first undoped silicon diox…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.