Low power consuming circuit
US6476641B2 · kind B2 · utility
6Cited by
2References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 3, 2001 |
| Grant date | Nov 5, 2002 |
| Priority date | — |
| Expiry date | Jul 3, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A low power consuming circuit is provided which is capable of reducing power consumption by using a Vt (threshold voltage) characteristic of a MIS (Metal Insulator Semiconductor) transistor for generating a source voltage. N-channel transistors making up an inverter is configured by being stacked vertically. An N-channel transistor source voltage control circuit controls voltages so that a gate voltage of an N-channel transistor source voltage bias transistor existing in a lower state is transferred to a drain voltage terminal of the N-channel transistor source voltage bias transistor or to a supply voltage terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.