Method and system for making optimal estimates of linearity metrics of analog-to-digital converters
US6476741B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2001 |
| Grant date | Nov 5, 2002 |
| Priority date | — |
| Expiry date | Apr 19, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and system for making optimal estimates of linearity metrics of analog-to-digital converters. A model building phase and a production test strategy are employed. During the model-building phase, a linear model an analog-to-digital converter is constructed from a set of accurately measured transition code voltages for a set of training analog-to-digital converters. During a production test of an individual analog-to-digital converter, a ramp test signal is applied to the individual analog-to-digital converter, a histogram of codes is produced, and the transition code voltages for the individual analog-to-digital converter are estimated from the resulting histogram. Linearity characteristics of the individual analog-to-digital converter may then be computed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.