Method and apparatus for content addressable memory with a partitioned match line
US6477071B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2001 |
| Grant date | Nov 5, 2002 |
| Priority date | — |
| Expiry date | May 7, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a content addressable memory (CAM) circuit that includes at least one row of memory cells storing data to be subjected to search data for a compare operation, with the cells in each row being inter-connected by a match line. Each cell can, if the search data does not match the stored data, discharge the match line in an evaluation operation. According to the present invention, a match line is partitioned into a least two segments, each segment having a first unit for precharging and evaluating the match line segment and a second unit for determining the result of the evaluation operation. The compare operation of the second and any subsequent segments is performed and the corresponding matchline segment involved only if the result of the compare operation of the respective preceding segment indicates a data match.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.