Dynamic regulation of power consumption of a high-speed communication system
US6477199B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2000 |
| Grant date | Nov 5, 2002 |
| Priority date | — |
| Expiry date | Oct 11, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03745
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method for dynamically regulating the power consumption of a high-speed integrated circuit which includes a multiplicity of processing blocks. A first metric and a second metric, which are respectively related to a first performance parameter and a second performance parameter of the integrated circuit, are defined. The first metric is set at a pre-defined value. Selected blocks of the multiplicity of processing blocks are disabled in accordance with a set of pre-determined patterns. The second metric is evaluated, while the disabling operation is being performed, to generate a range of values of the second metric. Each of the values corresponds to the pre-defined value of the first metric. A most desirable value of the second metric is determined from the range of values and is matched to a corresponding pre-determined pattern. The integrated circuit is subsequently operated with selected processing blocks disabled in accordance with the matching pre-determined pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.