Area-efficient convolutional decoder
US6477680B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 26, 1998 |
| Grant date | Nov 5, 2002 |
| Priority date | — |
| Expiry date | Jun 26, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6577
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A convolutional decoder for decoding received symbols in a communication system includes a branch metric calculator, and add-compare-select engine and a traceback unit. The branch metric calculator computes branch metrics for transitions in a trellis representative of a convolutional code used to generate the symbols. In accordance with the invention, the branch metrics are computed from an offset binary representation of the symbols using an inverse likelihood function, such that the resulting path metrics grow at a smaller rate and therefore require less memory. The add-compare-select engine processes path metrics generated from the branch metrics so as to determine a selected path through at least a portion of the trellis, and may utilize a state-serial architecture which computes path metrics for k states of a given stage of the trellis per clock cycle, using branch metrics obtained from k sets of registers in the branch metric calculator. The traceback unit generates a sequence of decoded bits from the selected path, and may be configured to include a staging register and a traceback memory. The staging register receives selected path information from the add-compare-select en…
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