Method of embedding RAMS and other macrocells in the core of an integrated circuit chip
US6477687B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 1, 1998 |
| Grant date | Nov 5, 2002 |
| Priority date | — |
| Expiry date | Jun 1, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/90
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Macrocells, e.g., Random Access Memory (“RAM”), are arranged in columns and disposed in a core of an integrated circuit (IC) chip. The macrocells can abut each other within the columns or can be separated from each other by standard cells which are disposed to fill gaps between the macrocells within the columns. Power/ground rails are disposed vertically along the sides of the columns. The power/ground rails run the full height of the core and couple to a power/ground ring disposed along the perimeter of the core. The power/ground rails also couple to the macrocells and the standard cells and provide power to those cells. The columns can form right angles with horizontal standard cell rows, thus enabling the standard cells to couple easily to the vertically disposed power/ground rails.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.