Method for forming a capacitor for semiconductor devices with diffusion barrier layer on both sides of dielectric layer
US6479364B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 2, 2001 |
| Grant date | Nov 12, 2002 |
| Priority date | — |
| Expiry date | Jan 2, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/712
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a capacitor for a semiconductor device is provided. In the method, a storage electrode is formed of a polysilicon layer, and a hemispherical silicate glass (HSG) layer is optionally formed on the surface of the storage electrode to increase the surface area of the storage electrode. Next, a TaSiN layer as a diffusion barrier is formed, a TaON layer as a dielectric layer is formed, and then a TaSiN layer is formed on the TaON layer. Next, a plate electrode is formed on the TaSiN layer, thereby completing a capacitor. Diffusion of oxygen between the electrodes and the dielectric layer is effectively blocked, so that reduction of capacitance and occurrence of leakage current are prevented. Due to improved dielectric characteristics of the TaON layer, increasing the surface area of the dielectric layer—for example, by forming a HSG layer—may not be required, thereby increasing a processing margin between adjacent capacitors. In addition, the thickness of the TaON layer can be adjusted, thereby raising the breakdown voltage of the TaON layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.