Blocked stepped address voltage for micromechanical devices
US6480177B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 1998 |
| Grant date | Nov 12, 2002 |
| Priority date | — |
| Expiry date | Jun 2, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/062
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of addressing an array of spatial light modulator elements. The method divides the array into blocks of elements, provides reset lines (MRST) to each of the block of elements, separate from the other blocks of elements, as well as address voltage supplies (VCCADDR) to each of the block of elements, separate from the other blocks of elements, addresses data to each of the blocks independent of the other blocks, resets each of the blocks, and steps address voltage to each of the block, where only blocks that are being reset receive the stepped address voltage. A spatial light modulator array (32) is also provided that has a layout to facilitate the method, including internal or external circuitry (34) to provide control of the stepped addressing voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.