Method and apparatus for filtering prefetches to provide high prefetch accuracy using less hardware
US6480939B2 · kind B2 · utility
16Cited by
2References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2000 |
| Grant date | Nov 12, 2002 |
| Priority date | — |
| Expiry date | Apr 18, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6022
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In general, the PBVT structure provides an effective method of filtering a stream of hardware generated prefetches by eliminating prefetch addresses that have proven to be inaccurate in the past. When compared to a design that uses a PFB of equal number of entries, the PBVT along with a small PFB provides virtually equivalent prefetch accuracy and miss rate reduction while using much less hardware area (97% less data storage space for a 1024-entry PFB case).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.