Secure partitioning of shared memory based multiprocessor system
US6480941B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 1999 |
| Grant date | Nov 12, 2002 |
| Priority date | — |
| Expiry date | Feb 23, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0284
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for sharing memory in a multiprocessor computing system. More specifically, this invention provides a number of system buses with each bus being connected to a respective memory controller which controls a corresponding partition of the memory. Any one of the processors can use any one of the system buses to send real addresses to the connected memory controller which then converts the real addresses into physical addresses corresponding to the partition of memory that is controlled by the receiving memory controller. The processors can be dynamically assigned to different partitions of the memory by via a switching mechanism.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.