Patent · US Expired

Integrated circuit design incorporating a power mesh

US6480989B2 · kind B2 · utility

236Cited by
9References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 29, 1998
Grant dateNov 12, 2002
Priority date
Expiry dateJun 29, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Provided is a technique for designing an integrated circuit die which includes a semiconductor layer, a primary metal layer, a horizontal metal layer and a vertical metal layer. Electronic components are laid out on the semiconductor layer, and a primary power distribution network for distributing power to the electronic components is laid out on the primary metal layer. Then, a uniform trunk width is calculated for all trunks in a power mesh based on a desired maximum voltage drop for the generated electronic component layout. Finally, horizontal power trunks are laid out on the horizontal metal layer and vertical power trunks are laid out on the vertical metal layer using the calculated uniform trunk width, so as to form the power mesh, and an electrical connection is specified between the power mesh and the primary power distribution network.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.