Rf integrated circuit layout
US6483188B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2000 |
| Grant date | Nov 19, 2002 |
| Priority date | — |
| Expiry date | May 15, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A radio-frequency (RF) integrated circuit is described. In one embodiment, the IC comprises multiple metal layers forming multiple transistors on a non-epitaxial substrate. The transistors are step and mirror symmetric. Also, the RF signal lines are on a top metal layer above all other metal layers and the power and ground planes are on a bottom metal layer below all other metal layers. The top and bottom metal layers are separated by a shield that extends beyond the RF signal lines by a distance that is at least the same distance that the shield is away from the RF lines. Low frequency signals are on signal lines below the top metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.