Configurable computational unit embedded in a programmable device
US6483343B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2000 |
| Grant date | Nov 19, 2002 |
| Priority date | — |
| Expiry date | Dec 29, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/5443
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A plurality of configurable computational units are embedded in a programmable device, such as a field programmable gate array. Each configurable computational unit includes an adder circuit that is switchably coupled to a multiplier circuit and an accumulator circuit. The configurable computational unit may be configured permanently or on-the-fly to perform desired arithmetic type functions efficiently and effectively. For example, the computational unit may be configured for digital signal processing functions, filtering functions, and algorithm functions. The computational units may be cascaded by programmably connecting the computational units together, e.g., through the routing resources of the programmable device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.