Frame synchronizer
US6483885B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 1999 |
| Grant date | Nov 19, 2002 |
| Priority date | — |
| Expiry date | Sep 3, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0608
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A frame synchronizer for use in a receiver that receives an encoded signal from a transmitter includes a conjugation unit, a delay unit and multiplier coupled together to process the encoded signal. The multiplier multiplies either the received encoded signal by a conjugated, delayed version of the received encoded signal or multiplies a conjugated version of the received encoded signal by a delayed version of the received encoded signal to produce a first product signal. A further multiplier multiplies the first product signal with a locally-stored signal to generate a second product signal. An accumulator accumulates the second product signal over a plurality of bit times to generate an accumulated signal having a magnitude representing a time synchronization offset between the receiver and the transmitter and phase representing a frequency synchronization offset between the receiver and the transmitter. A synchronization correction unit generates a time offset correction and a frequency offset correction from the accumulated signal and these corrections are used to correct offsets between the receiver and the transmitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.