Shared memory tracing apparatus
US6484243B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2000 |
| Grant date | Nov 19, 2002 |
| Priority date | — |
| Expiry date | Aug 31, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/348
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A signal processing apparatus in which an LSI includes a memory and a plurality of blocks for making access to the memory is provided with a trace control block 170 for tracing in a specific region of the memory the history of access by a required memory access block based on a setting by a microcomputer 110 so as to allow easy analysis of the cause in the event a trouble. Also, a quasi mediation block 180 is provided in a mediation block 150, which accepts a memory use request signal from other memory access block while tracing of access history is being performed and sends back a memory use approval signal without actually making access to an internal memory 160. In the event of a trouble, an analysis of the cause can be easily made by reading a specific tracing region of the internal memory 160 out from outside.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.