Structures and method with bitline self-aligned to vertical connection
US6486518B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 1999 |
| Grant date | Nov 26, 2002 |
| Priority date | — |
| Expiry date | Sep 29, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/482
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A way to combine the metal bitline with the vertical interconnection to the capacitor over the bitline. In this class of embodiments, the vertical interconnect pillar is formed before fabrication of the bitline is completed. To accomplish this, the bitline metal is patterned using a step which allows it to extend vertically along the walls of the vertical interconnect pillar, but does not create any electrical connection between the bitline metal and the vertical interconnect pillar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.