Latch control circuit for crossing clock domains
US6486721B2 · kind B2 · utility
6Cited by
3References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2001 |
| Grant date | Nov 26, 2002 |
| Priority date | — |
| Expiry date | Mar 2, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/037
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A latch control circuit for overcoming phase uncertainty between crossing clock domains, which includes an interface and control circuit for controlling and communicating data between the clock domains and, which also includes either static or dynamic initialization circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.