Method and apparatus for deinterlacing digital video images
US6489998B1 · kind B1 · utility
27Cited by
5References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 11, 1999 |
| Grant date | Dec 3, 2002 |
| Priority date | — |
| Expiry date | Aug 11, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/426
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A digital image processor is provided. The digital image processor includes a deinterlacing processor that is implemented upon a digital processing unit. The deinterlacing processor is coupled to an input operable to receive an interlaced video stream, a digital memory for storing portions of the interlaced video signal, and an output operable to transmit a deinterlaced video stream. The deinterlacing processor is operable to perform frequency analysis upon the received interlaced video stream in order to generate the deinterlaced video stream having reduced motion artifacts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.