Integrated circuit device made secure by means of additional bus lines
US6490646B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 14, 1999 |
| Grant date | Dec 3, 2002 |
| Priority date | — |
| Expiry date | Jun 14, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device adapted to be incorporated into a portable article having a memory, in particular of a card format. The device includes a central processor unit, at least one memory, at least one data input/output pad, n address bus lines connecting the central processor unit to the memory and/or to the input/output pad to carry address bits, and D data bus lines connecting the central processor unit to the memory and/or to the input/output pad for conveying data bits. At least one address line from the address bus and the data bus is associated with an additional line for conveying bits that are complementary to the bits conveyed over the address bus line or data bus line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.