Method for the packaging of electronic components
US6492194B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2000 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | Nov 1, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for the packaging of electronic components, including the mounting of at least one electronic component on its active face side to a base, the base including electrical contacts on an external face and connection pads on a face opposite the external face, and including a first series of via holes connecting the electrical contacts and the connection pads and a second series of holes for use in aspiration. A deformable film is deposited on the face opposite to the active face of the electronic component or components. The deformable film is aspirated through the second series of holes from the face opposite the external face of the base, so as to sheath the electronic component or components. The method may furthermore include, on top of the deformable film, a mineral deposition to provide for the hermetic sealing of the components and a conductive deposition to provide for the shielding. Such an application may find particular application to surface wave filters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.