Method for fabricating avalanche photodiode
US6492239B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2001 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | May 29, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F30/2255
Abstract
An avalanche photodiode fabricating method with a simplified fabrication process and an improved reproducibility is disclosed. The method for fabricating an avalanche photodiode includes the steps of: (a) sequentially stacking, on an n-type InP substrate, an, InP buffer layer, an InGaAs absorption layer, an n-type InGaAsP grading layer, an n-type InP current adjusting layer, and an InP amplifying layer; (b) forming a protection layer on the InP amplifying layer, etching a light-receiving area of the protection layer and the InP amplifying layer to a predetermined depth, and partially etching the protection layer to expose a FGR forming area of the InP amplifying layer; (c) diffusing a diffusion source in the etched light-receiving area and the exposed FGR forming area; (d) forming a reflection suppressing layer on the diffusion layer formed on the light-receiving area by diffusing the diffusion source, the FGR layer and the exposed amplifying layer; (e) forming an upper electrode layer to a predetermined depth from the reflection suppressing layer to the diffusion layer formed on the light-receiving area; and, (f) forming a lower electrode layer on a back of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.