Semiconductor device
US6492681B2 · kind B2 · utility
29Cited by
3References
18Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Mar 6, 2001 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | Mar 22, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
The present invention has provided on a back channel side of the TFT a blocking layer that is formed by laminating a 50 nm to 100 nm thick silicon oxynitride film (A) and a 30 nm to 70 nm thick silicon oxynitride film (B). By forming a lamination structure of such silicon oxynitride films, not only can be the contaminations caused by impurities such as alkali metallic elements from the substrate prevented, but the fluctuations in the electrical characteristics of the TFT can be reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.