Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
US6493271B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 16, 2001 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | Nov 16, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having an electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.