Semiconductor integrated circuit
US6493282B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2001 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | Sep 6, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/104
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes: a first n-well defined in a p-type semiconductor region; word lines; data lines; and a DRAM array. In the array, memory cells are arranged in matrix over the first n-well. Each memory cell includes a p-channel MOS access transistor and a capacitor. The access transistor has its gate connected to an associated one of the word lines, its source connected to an associated one of the data lines and its drain connected to the capacitor. The integrated circuit further includes: a row of sense amplifiers coupled to the data lines; a word line driver for driving the word lines; and a power supply circuit. The power supply circuit receives an external supply voltage, generates internal supply voltages by stepping down the external supply voltage and then applies the internal supply voltages to the sense amplifiers, word line driver and first n-well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.