Chipkill for a low end server or workstation
US6493843B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 28, 1999 |
| Grant date | Dec 10, 2002 |
| Priority date | — |
| Expiry date | Oct 28, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1012
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides a process and memory configuration for providing chipkill error detection in a low end server without requiring non-standard components or additional memory devices. Typically, the number of error correction bits required for chipkill functionality is dependent on the width of the memory chip to be corrected and the CRC algorithm that is used. If the required number of error correction bits is not provided by the memory system, another option according to the present invention, is to perform doubleword operation for consecutive memory locations in a single DIMM module. Reading the memory module in double words basically provides the system with double its previous number of ECC bits per data transfer. Since these low end systems would typically not have the number of error correction bits necessary to do the chipkill operation, this double word technique allows chipkill for low end systems which would normally not be able to perform the chipkill operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.