Method and apparatus for measuring the phase of captured read data
US6496043B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2001 |
| Grant date | Dec 17, 2002 |
| Priority date | — |
| Expiry date | Dec 13, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2281
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A phase measurement circuit includes first and second complementary clock strobe inputs, a local clock input and a sample clock output. A programmable delay line is coupled between the local clock input and the sample clock output and has a plurality of propagation delay settings. First and second toggle circuits are clocked by the first and second clock strobe inputs, respectively, and each has a toggle output that changes state when clocked by the respective first or second clock strobe input. A capture latch circuit has first and second data inputs coupled to the toggle outputs of the first and second toggle circuits, respectively, has first and second capture outputs, and is clocked by the sample clock output. A synchronizer circuit has first and second data inputs coupled to the first and second capture outputs, respectively, has first and second synchronized capture outputs, and is clocked by the local clock input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.