System with chrominance delay lines
US6496227B1 · kind B1 · utility
6Cited by
14References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 21, 1999 |
| Grant date | Dec 17, 2002 |
| Priority date | — |
| Expiry date | May 21, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/77
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system with chrominance delay lines has a first sampled channel including at least one smoothing filter, and has a second unsampled channel. A continuous bypass filter is placed in the second channel to balance the pulse response from these two channels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.