Tile array computers
US6496359B2 · kind B2 · utility
18Cited by
1References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2000 |
| Grant date | Dec 17, 2002 |
| Priority date | — |
| Expiry date | Dec 8, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/1446
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A tile array computer is disclosed. A tile array computer is formed by individual tiles, each typically containing a display surface, a processor, memory, and communication devices for providing communications with adjoining tiles or the support structure upon which the tiles are placed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.