Semiconductor memory device
US6496403B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2001 |
| Grant date | Dec 17, 2002 |
| Priority date | — |
| Expiry date | Jul 18, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4093
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed a semiconductor memory device in which an access to a memory cell is designated according to a command, and a common data terminal is used as an input terminal to which a write signal to the memory cell is input and an output terminal from which a read signal from the memory cell is output. The semiconductor memory device includes: a first input circuit having input capacitance corresponding to the input terminal to which the command is input; and a second input circuit having input capacitance corresponding to the data terminal. A mask signal for checking the write signal input from the data terminal is input by either the first or second input circuit by a bonding option technique.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.