Variable capacity semiconductor memory device
US6496409B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 20, 2000 |
| Grant date | Dec 17, 2002 |
| Priority date | — |
| Expiry date | Jul 20, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention provides a semiconductor memory capable of realizing an efficient use of a memory area and reducing manufacturing costs. A memory has a memory cell array comprising a matrix of cells for electrically storing data. The memory cell array is divided into a plurality of block areas. Each block area is set to a four-valued area for recording the data as four-valued data or a binary area for recording the data as binary data. On an access to a memory cell (writing or reading of the data), a word line voltage for writing or a sense amplifier for reading is switched in accordance with whether the data to be accessed is the binary data or the four-valued data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.